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SAF3560
Terrestrial digital radio processor
Rev. 03 -- 15 September 2010 Product short data sheet
1. General description
The SAF3560 is a digital radio processor that demodulates and processes digital terrestrial baseband signals, such as HD Radio signals, into audio signals and digital data signals.
TUNER1
IF PROCESSING baseband I 2S interface blend digital audio
OPTIONAL AUDIO POST PROCESSING AND STEREO AUDIO DAC
blended audio (analog)
SPI2
SERIAL NOR-FLASH MEMORY
SAF3560
SDRAM baseband I2S interface I2C-bus or SPI1 RENDERING OF DATA: TUNER2 IF PROCESSING MICROPROCESSOR LIVE TRAFFIC REPORTS WEATHER SPORTS SCORES STOCK TICKER
001aal423
(1) Second input only supported by specific types (see Table 3)
Fig 1.
System block diagram
Major benefits of terrestrial radio processor systems with SAF3560 are:
* * * * * *
Compatibility with conventional baseband radio reception ICs Dramatically improved reception and sound quality CD-sound quality without noise, interference and multipath fading for FM Providing new data services HD Radio reception including audio processing Voltage partitioning of I/Os
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
System designers can add digital terrestrial radio capability in a simple and inexpensive way through the SAF3560. The SAF3560 decodes digital radio input to provide digital audio and also processes digital data. Multiple interfaces give flexibility while integrating the SAF3560 into the receiver system.
2. Features and benefits
2.1 HD Radio technology
HD Radio signal decoding for AM and FM digital audio Dual HD Radio support for support of 2nd station for background scanning and data service Front-end to baseband interface support through serial baseband I2S-bus type interface Secondary baseband interface for dual tuner applications Metadata support for HD Radio reception Data services support for HD Radio reception Advanced HD Radio feature support, such as1: Conditional Access (CA) Store and replay Apple ID3 tag Multicasting Electronic Program Guide (EPG)
2.2 Digital audio
Up to 6 channel (5.1) audio support through I2S-bus serial audio interface Optional SRC (8 kHz to 48 kHz) for up to 6 channels of I2S-bus audio output I2S-bus serial audio input for auxiliary processing Optional SRC (8 kHz to 48 kHz) for I2S-bus input Optional restricted support for 96 kHz input and output sample-rate conversion Optional digital audio output through S/PDIF (without SRC) Basic audio processing for external digital audio sources Advanced audio processing (please contact NXP for a list of supported audio processing features: Section 14 "Contact information")
2.3 Memory
Supports SDR-SDRAM controller (up to 512 Mbit in 16-bit configuration) Supports serial NOR-Flash memory with various sizes depending on the actual application
1.
Please contact NXP for a detailed list of supported feature sets: Section 14 "Contact information".
All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
SAF3560_SDS
Product short data sheet
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NXP Semiconductors
SAF3560
Terrestrial digital radio processor
2.4 Other peripheral interfaces
Two I2C-bus interfaces Three Serial Peripheral Interfaces (SPI) One UART interface Five individual GPIO pins for applications and diagnostics One JTAG interface for diagnostics
2.5 Miscellaneous
One internal clock oscillator and two internal Phase-Locked Loops (PLL) Powerful signal and audio processing core architecture Qualified in accordance with AEC-Q100
3. Quick reference data
Table 1. Power supply characteristics After power-up the SAF3560 needs a reset pulse for at least 2 ms. Symbol Supply voltages VDDA(OSC)(1V2) VDDA(PLL)(1V2) VDDD(C)(1V2) VDDD(DAB)(3V3) VDDD(DSP)(3V3) VDDD(JTAG)(3V3) VDDD(MC)(3V3) VDDD(MEM)(1V2) VDDD(SDRAM)(3V3) Supply currents IDD supply current all core related blocks all I/O related blocks Power dissipation Ptot
[1] [2]
[1] [2]
Parameter oscillator analog supply voltage (1.2 V) PLL analog supply voltage (1.2 V) core digital supply voltage (1.2 V) DAB digital supply voltage (3.3 V) DSP digital supply voltage (3.3 V) JTAG digital supply voltage (3.3 V) microcontroller digital supply voltage (3.3 V) memory digital supply voltage (1.2 V) SDRAM digital supply voltage (3.3 V)
Conditions
Min 1.14 1.14 1.14 3.0 3.0 3.0 3.0 1.14 3.0 -
Typ 1.2 1.2 1.2 3.3 3.3 3.3 3.3 1.2 3.3 90 28 0.2
Max 1.32 1.32 1.32 3.6 3.6 3.6 3.6 1.32 3.6 116 37 0.5
Unit V V V V V V V V V mA mA W
total power dissipation
Through pins VDDA(OSC)(1V2), VDDA(PLL)(1V2), VDDD(C)(1V2) and VDDD(MEM)(1V2). Through pins VDDD(DAB)(3V3), VDDD(DSP)(3V3), VDDD(JTAG)(3V3), VDDD(MC)(3V3) and VDDD(SDRAM)(3V3).
SAF3560_SDS
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(c) NXP B.V. 2010. All rights reserved.
Product short data sheet
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SAF3560
Terrestrial digital radio processor
4. Ordering information
Table 2. Ordering information Package Name SAF3560HV/V1100 SAF3560HV/V1101 SAF3560HV/V1102 SAF3560HV/V1103 HLQFP144 HLQFP144 HLQFP144 HLQFP144 Description plastic thermal enhanced low profile quad flat package; 144 leads; body 20 x 20 x 1.4 mm; exposed die pad plastic thermal enhanced low profile quad flat package; 144 leads; body 20 x 20 x 1.4 mm; exposed die pad plastic thermal enhanced low profile quad flat package; 144 leads; body 20 x 20 x 1.4 mm; exposed die pad plastic thermal enhanced low profile quad flat package; 144 leads; body 20 x 20 x 1.4 mm; exposed die pad Version SOT612-4 SOT612-4 SOT612-4 SOT612-4 Type number
Table 3.
Main applications Main application HD Radio 1.0 HD Radio 1.0 + Conditional Access (CA) HD Radio 1.5 HD Radio 1.5 + Conditional Access (CA) Option single tuner single tuner dual tuner dual tuner
Type number SAF3560HV/V1100 SAF3560HV/V1101 SAF3560HV/V1102 SAF3560HV/V1103
SAF3560_SDS
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(c) NXP B.V. 2010. All rights reserved.
Product short data sheet
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Product short data sheet Rev. 03 -- 15 September 2010 5 of 20
SAF3560_SDS
5. Block diagram
NXP Semiconductors
RESET_N
XTAL
JTAG
SPI1 (host) FLASH SPI2 (FLASH) SPI3 (tuner) 2 x I2C-bus GPIO UART I/O MUX I/O CONTROLLER
RESET
CGU
CLOCK
JTAG CONTROLLER
SAF3560
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internal bus
MEMORY CONTROLLER
SDRAM
SDRAM
RADIO SUB SYSTEM baseband interface 1 (HD Radio) baseband interface 2 (HD Radio) FILTER AND SRC DUAL CHANNEL RADIO (1 x audio and data 1 x data only)
AUDIO SUB SYSTEM SINGLE CHANNEL AUDIO
AUDIO SRC
3 x audio I2S output (optional S/PDIF)
Terrestrial digital radio processor
BLEND
audio I2S input
001aal422
SAF3560
Fig 2.
Block diagram of SAF3560
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
6. Pinning information
6.1 Pinning
SAF3560
144 109 108 73 37 72
001aah072
1
36
Fig 3. Table 4. Pin 1 5 9 13 17 21 25 29 33 37 41 45 49 53 57 61 65 69 73 77 81 85 89
SAF3560_SDS
Pin configuration (HLQFP144) Pin allocation table (HLQFP144) Pin 2 6 10 14 18 22 26 30 34 38 42 46 50 54 58 62 66 70 74 78 82 86 90 Symbol RESET_N VDDD(MC)(3V3) SPI1_SO VDDD(C)(1V2) SPI2_SCLK SPI2_SS3_N UART_RTS SPI3_MISO VDDD(DAB)(3V3) GPIO2 VDDD(DAB)(3V3) BB1_I2S_Q BB2_I2S_Q I2S1_O_BCK VDDD(MEM)(1V2) I2S_I_WS SDRAM_DIO1 SDRAM_DIO4 SDRAM_DIO7 VDDD(SDRAM)(3V3) Pin 3 7 11 15 19 23 27 31 35 39 43 47 51 55 59 63 67 71 75 79 83 87 91 Symbol I2C1_SCL I2C2_SCL SPI1_SI VDDD(MC)(3V3) SPI2_SS1_N SPI2_SS4_N VDDD(C)(1V2) SPI3_MOSI SPI3_SS2_N GPIO3 BB1_I2S_BCK BB2_I2S_BCK VDDD(C)(1V2) I2S1_O_WS VDDD(DSP)(3V3) I2S_I_BCK SDRAM_DIO2 SDRAM_DIO5 SDRAM_DIO8 VDDD(C)(1V2) Pin 4 8 12 16 20 24 28 32 36 40 44 48 52 56 60 64 68 72 76 80 84 88 92 Symbol I2C1_SDA I2C2_SDA SPI1_SCLK SPI2_MI SPI2_SS2_N UART_TD VDDD(MC)(3V3) SPI3_SCLK GPIO0 GPIO4 BB1_I2S_WS BB2_I2S_WS VDDD(DSP)(3V3) I2S1_O_SD I2S2_O_SD I2S_I_SD VDDD(SDRAM)(3V3) SDRAM_DIO6 SDRAM_DIO9 SDRAM_DIO11
(c) NXP B.V. 2010. All rights reserved.
Symbol CLKOUT I2C1_DA I2C2_DA SPI1_SS_N SPI2_MO VDDD(MC)(3V3) UART_RD UART_CTS SPI3_SS1_N GPIO1 -[1] BB1_I2S_I BB2_I2S_I HBCKOUT BLEND I2S3_O_SD/ SPDIF_O SDRAM_DIO0 SDRAM_DIO3 VDDD(SDRAM)(3V3) SDRAM_DIO10
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Product short data sheet
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SAF3560
Terrestrial digital radio processor
Pin allocation table (HLQFP144) ...continued Pin 94 98 Symbol SDRAM_DIO13 SDRAM_WE_N Pin 95 99 Symbol SDRAM_DIO14 SDRAM_DQM0 Pin 96 Symbol VDDD(SDRAM)(3V3)
Table 4. Pin 93 97
Symbol SDRAM_DIO12 SDRAM_DIO15
100 SDRAM_DQM1 104 SDRAM_BA1 108 SDRAM_CAS_N 112 116 VDDD(SDRAM)(3V3) VDDD(SDRAM)(3V3)
101 VDDD(SDRAM)(3V3) 105 SDRAM_CS_N 109 SDRAM_CLKE 113 117 SDRAM_AO2 SDRAM_AO5
102 VDDD(MEM)(1V2) 110 114 118 SDRAM_AO0 SDRAM_AO3 SDRAM_AO6
103 SDRAM_BA0 111 115 119 SDRAM_AO1 SDRAM_AO4 SDRAM_AO7
106 SDRAM_RAS_N 107 VDDD(SDRAM)(3V3)
120 SDRAM_AO8 124 VDDD(C)(1V2) 128 SDRAM_CLKIN 132 TCK 136 TDO 140 VDDA(OSC)(1V2) 144 VSS[2]
121 SDRAM_AO9 125 SDRAM_AO11 129 VDDD(SDRAM)(3V3) 133 TMS 137 VSS
[2]
122 VDDD(SDRAM)(3V3) 126 SDRAM_AO12 130 VSS[2] 134 VDDD(C)(1V2) 138 VDDD(JTAG)(3V3) 142 XTALO
123 SDRAM_AO10 127 SDRAM_CLK 131 TRST_N 135 TDI 139 VDDA(PLL)(1V2) 143 VDDD(MEM)(1V2)
141 XTALI
[1] [2]
See Table 14 for unused pins. Global VSS pin at backside contact
6.2 Pin description
Table 5. Pin description overview Details analog and digital supply pins baseband and audio pins (I2S-bus) GPIO and SPI3 pins data, address and control pins SPI2 pins SPI1, I2C1, I2C2, UART, CLKOUT and RESET_N pins JTAG pins XTALI and XTALO pins Table number Table 6 Table 7 Table 8 Table 9 Table 10 Table 11 Table 12 Table 13 Pin category Power supply pins Baseband interface pins Generic interface pins SDRAM interface pins Serial NOR-Flash interface pins External host microcontroller interface pins JTAG interface pins Crystal oscillator pins Table 6. Symbol VSS Analog supplies VDDA(OSC)(1V2) VDDA(PLL)(1V2) Digital supplies VDDD(C)(1V2) VDDD(DAB)(3V3)
SAF3560_SDS
Pin description (power supplies) Pin 130, 137, 144 and backside contact 140 139 14, 27, 63, 91, 124 and 134 34 and 42 Type[1] G Description analog and digital global ground supply
Global ground supply
P P P P
oscillator analog supply voltage (1.2 V) PLL analog supply voltage (1.2 V) core digital supply voltage (1.2 V) DAB digital supply voltage (3.3 V)
(c) NXP B.V. 2010. All rights reserved.
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Product short data sheet
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SAF3560
Terrestrial digital radio processor
Pin description (power supplies) ...continued Pin 64 and 71 138 6, 15, 21 and 28 Type[1] P P P Description DSP digital supply voltage (3.3 V) JTAG digital supply voltage (3.3 V) microcontroller digital supply voltage (3.3 V) SDRAM digital supply voltage (3.3 V) memory digital supply voltage (1.2 V)
Table 6. Symbol
VDDD(DSP)(3V3) VDDD(JTAG)(3V3) VDDD(MC)(3V3) VDDD(SDRAM)(3V3) VDDD(MEM)(1V2)
[1]
80, 85, 90, 96, 101, 107, P 112, 116, 122 and 129 70, 102 and 143 P
Table 15 defines the pin type.
Table 7. Symbol
Pin description (baseband interface) Pin 55 57 58 56 69 59 61 62 60 Type[1] IOZU-H IZU-H IZU-H IOZU-H OL IOZU-H IZU-H IZU-H IOZU-H Description bit clock input and output of first baseband interface I data input line of first baseband interface Q data input line of first baseband interface word select input and output line of first baseband interface blend indicator output, HIGH = digital audio / LOW = analog radio[2] bit clock input and output of second baseband interface I data input line of second baseband interface Q data input line of second baseband interface word select input and output line of second baseband interface high-speed bit clock output[3] bit clock input and output line of I2S-bus input interface serial data input line of I2S-bus input interface word select input and output line of I2S-bus input interface serial data output line of third I2S-bus output interface; in alternative Sony/Philips digital output interface serial data output line of second I2S-bus output interface bit clock input and output line of first I2S-bus output interface serial data output line of first I2S-bus output interface word select input and output line of first I2S-bus output interface
Baseband interface BB1_I2S_BCK BB1_I2S_I BB1_I2S_Q BB1_I2S_WS BLEND BB2_I2S_BCK BB2_I2S_I BB2_I2S_Q BB2_I2S_WS Audio interface HBCKOUT I2S_I_BCK I2S_I_SD I2S_I_WS I2S3_O_SD/ SPDIF_O I2S2_O_SD I2S1_O_BCK I2S1_O_SD I2S1_O_WS
[1] [2] [3]
65 75 76 74 73 72 66 68 67
IOZU IOZU-H IZU-H IOZU-H OL OL IOZU-H OL IOZU-H
Table 15 defines the pin type. Required for seamless switching between digital and analog AM/FM modes in HD Radio applications under bad reception conditions. 256 x fS output, required by some external DACs.
SAF3560_SDS
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Product short data sheet
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SAF3560
Terrestrial digital radio processor
Pin description (generic tuner interface) Pin 40 39 38 37 36 30 31 32 Type[1] IOZU IOZU IOZU IOZU IOZU Description general purpose input and output port 4 general purpose input and output port 3 general purpose input and output port 2 general purpose input and output port 1 general purpose input and output port 0
Table 8. Symbol GPIO4 GPIO3 GPIO2 GPIO1 GPIO0
GPIO interface
SPI3 interface SPI3_MISO SPI3_MOSI SPI3_SCLK IOZU-H master input, slave output of third SPI interface IOZU-H master output, slave input of third SPI interface IOZU-H serial clock input and output of third SPI interface IOZU-H slave select 1 input and output of third SPI interface (active LOW) OZU slave select 2 output of third SPI interface (active LOW)
SPI3_SS1_N 33 SPI3_SS2_N 35
[1]
Table 15 defines the pin type.
Table 9. Symbol
Pin description (SDRAM interface) Pin 97 95 94 93 92 89 88 87 86 84 83 82 81 79 78 77 126 125 123 121 120 119 118 Type[1] IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL IOL OZU OZU OZU OZU OZU OZU OZU Description data input and output bit 15 data input and output bit 14 data input and output bit 13 data input and output bit 12 data input and output bit 11 data input and output bit 10 data input and output bit 9 data input and output bit 8 data input and output bit 7 data input and output bit 6 data input and output bit 5 data input and output bit 4 data input and output bit 3 data input and output bit 2 data input and output bit 1 data input and output bit 0 address output bit 12 address output bit 11 address output bit 10 address output bit 9 address output bit 8 address output bit 7 address output bit 6
(c) NXP B.V. 2010. All rights reserved.
Data input and output interface SDRAM_DIO15 SDRAM_DIO14 SDRAM_DIO13 SDRAM_DIO12 SDRAM_DIO11 SDRAM_DIO10 SDRAM_DIO9 SDRAM_DIO8 SDRAM_DIO7 SDRAM_DIO6 SDRAM_DIO5 SDRAM_DIO4 SDRAM_DIO3 SDRAM_DIO2 SDRAM_DIO1 SDRAM_DIO0 SDRAM_AO12 SDRAM_AO11 SDRAM_AO10 SDRAM_AO9 SDRAM_AO8 SDRAM_AO7 SDRAM_AO6
SAF3560_SDS
Address output interface
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SAF3560
Terrestrial digital radio processor
Pin description (SDRAM interface) ...continued Pin 117 115 114 113 111 110 104 103 108 127 109 128 105 100 99 106 98 Type[1] OZU OZU OZU OZU OZU OZU OZU OZU OZU OZU OZU IZU OZU OL OL OZU OZU Description address output bit 5 address output bit 4 address output bit 3 address output bit 2 address output bit 1 address output bit 0 bit 1 of bank address output bit 0 of bank address output column address selector output (active LOW) clock output clock enable output clock input for re-synchronization chip select output (active LOW) MSByte of data qualifier mask output LSByte of data qualifier mask output row address selector output (active LOW) write enable output (active LOW)
Table 9. Symbol
SDRAM_AO5 SDRAM_AO4 SDRAM_AO3 SDRAM_AO2 SDRAM_AO1 SDRAM_AO0 Control interface SDRAM_BA1 SDRAM_BA0 SDRAM_CAS_N SDRAM_CLK SDRAM_CLKE SDRAM_CLKIN SDRAM_CS_N SDRAM_DQM1 SDRAM_DQM0 SDRAM_RAS_N SDRAM_WE_N
[1]
Table 15 defines the pin type.
Table 10. Symbol
Pin description (serial NOR-Flash interface) Pin 16 17 18 Type[1] IZU OZD OZU OZU OZU OZU OZU Description master input of second SPI interface master output of second SPI interface serial clock output of second SPI interface slave select 1 output of second SPI interface (active LOW) slave select 2 output of second SPI interface (active LOW) slave select 3 output of second SPI interface (active LOW) slave select 4 output of second SPI interface (active LOW)
SPI2 interface SPI2_MI SPI2_MO SPI2_SCLK
SPI2_SS1_N 19 SPI2_SS2_N 20 SPI2_SS3_N 22 SPI2_SS4_N 23
[1]
Table 15 defines the pin type.
SAF3560_SDS
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Product short data sheet
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SAF3560
Terrestrial digital radio processor
Pin description (external host microcontroller interface) Pin 1 2 9 7 8 5 3 4 12 11 10 13 29 25 26 24 Type[1] OL IZU-H Description clock output; clock source and clock frequency are programmable through software master reset input from host microcontroller (active LOW)
Table 11. Symbol CLKOUT RESET_N I2C-bus I2C2_DA I2C2_SCL I2C2_SDA I2C1_DA I2C1_SCL I2C1_SDA
interface (master and slave) IOZD-H data acknowledge input and output of the I2C-bus interface 2 IOZU IOZU IOZU serial clock input and output of the I2C-bus interface 2 serial data input and output of the I2C-bus interface 2 serial clock input and output of the I2C-bus interface 1
IOZD-H data acknowledge input and output of the I2C-bus interface 1 IOZU-H serial data input and output of the I2C-bus interface 1 IZU-H IZU-H OL IZU-H IZU IZU OH OH serial clock input of first SPI interface slave input of first SPI interface slave output of first SPI interface slave select input of first SPI interface (active LOW) UART clear-to-send signal input UART receive data input UART ready-to-send signal output UART transmit data output
SPI1 interface SPI1_SCLK SPI1_SI SPI1_SO SPI1_SS_N UART_CTS UART_RD UART_RTS UART_TD
[1]
UART interface
Table 15 defines the pin type.
Table 12. Symbol TCK TDI TDO TMS TRST_N
[1]
Pin description (JTAG interface) Pin 132 135 136 133 131 Type[1] IZU IZU OL IZU IZU Description test clock input test serial data input test serial data output test mode select input test reset input; drive LOW for normal operating
Table 15 defines the pin type.
Table 13. Symbol XTALI XTALO
[1]
Pin description (crystal oscillator) Pin 141 142 Type[1] AI AO Description crystal oscillator analog input crystal oscillator analog output
Table 15 defines the pin type.
Table 14. Symbol i.c.
Pin description (internally connected pins) Pin 41, 43 to 54 Type Description internally connected; leave open
SAF3560_SDS
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SAF3560
Terrestrial digital radio processor
Pin type description Description analog input pin analog output pin ground pin digital input and output; drives LOW after reset digital input and output pin with weak pull-down digital input and output pin with weak pull-up digital input pin with weak pull-up digital output; drives HIGH after reset digital output; drives LOW after reset digital output pin with weak pull-down digital output pin with weak pull-up power supply pin pins with hysteresis Unused pins[1] always connect to quartz crystal always connect to quartz crystal use all ground pins can be left open can be left open can be left open can be left open can be left open can be left open can be left open can be left open use all power supply pins see generic types
Table 15. Type AI AO G IOL IOZD IOZU IZU OH OL OZD OZU P -H
[1]
Generic pin types
Specific pin types
Applications, which do not need all pins from SAF3560, can treat unused pins as indicated without damage or malfunction of the device.
SAF3560_SDS
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Product short data sheet
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SAF3560
Terrestrial digital radio processor
7. Limiting values
Table 16. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol VDDA(OSC)(1V2) VDDA(PLL)(1V2) VDDD(C)(1V2) VDDD(DAB)(3V3) VDDD(DSP)(3V3) VDDD(JTAG)(3V3) VDDD(MC)(3V3) VDDD(SDRAM)(3V3) VDDD(MEM)(1V2) Tamb Tstg VESD Parameter oscillator analog supply voltage (1.2 V) PLL analog supply voltage (1.2 V) core digital supply voltage (1.2 V) DAB digital supply voltage (3.3 V) DSP digital supply voltage (3.3 V) JTAG digital supply voltage (3.3 V) microcontroller digital supply voltage (3.3 V) SDRAM digital supply voltage (3.3 V) memory digital supply voltage (1.2 V) ambient temperature storage temperature electrostatic discharge voltage human body model charged device model corner pins other pins Ilu latch-up current all supply voltages below the maximum values listed in this table
[2] [1] [2]
Conditions
Min -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -0.5 -40 -65 -100
Max +1.7 +1.7 +1.7 +3.9 +3.9 +3.9 +3.9 +3.9 +1.7 +85 +150 2000 750 500 +100
Unit V V V V V V V V V C C V V V mA
[1] [2]
Class 2 according to JEDEC JESD22-A114. According to AEC-Q100-G.
8. Thermal characteristics
The SAF3560 has no special thermal requirements. The backside contact is needed for electrical reasons. For soldering considerations, see Section 10.
Table 17. Symbol Rth(j-a)
[1]
Thermal characteristics Parameter thermal resistance from junction to ambient Conditions in free air
[1]
Typ 26.3
Unit K/W
The overall Rth(j-a) is based on JEDEC conditions and can vary depending on the board layout. To minimize the effective Rth(j-a) all power and ground pins must be connected to the power and ground layers directly. An ample amount of copper area directly under the SAF3560 with a number of through-hole plating, which connect to the ground layer (four-layer board: second layer), can also reduce the effective Rth(j-a). Do not use any solder-stop varnish under the chip. In addition the use of soldering glue with a high thermal conductance after curing is recommended.
SAF3560_SDS
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(c) NXP B.V. 2010. All rights reserved.
Product short data sheet
Rev. 03 -- 15 September 2010
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SAF3560
Terrestrial digital radio processor
9. Package outline
HLQFP144: plastic thermal enhanced low profile quad flat package; 144 leads; body 20 x 20 x 1.4 mm; exposed die pad
SOT612-4
c y exposed die pad X
Dh
108 109 73 72
A
ZE e A2
Eh
E
HE
A
A1
(A3)
w pin 1 index
144 1 36 37
M
Lp detail X L
bp
e
bp D HD
w
M
ZD B v
v
M
A
M
B
0
5 scale
10 mm
DIMENSIONS (mm are the original dimensions) UNIT mm A max 1.6 A1 0.12 0.05 A2 1.45 1.35 A3 0.25 bp 0.27 0.17 c 0.20 0.09 D(1) 20.1 19.9 Dh 4.3 4.1 E(1) 20.1 19.9 Eh 4.3 4.1 e 0.5 HD HE L 1 Lp 0.75 0.45 v 0.2 w 0.08 y 0.08 ZD(1) ZE(1) 1.4 1.1 1.4 1.1
7 0
22.15 22.15 21.85 21.85
Note 1. Plastic or metal protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT612-4 REFERENCES IEC JEDEC MS-026 JEITA EUROPEAN PROJECTION ISSUE DATE 07-12-11 08-01-18
Fig 4.
SAF3560_SDS
Package outline SOT612-4 (HLQFP144)
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SAF3560
Terrestrial digital radio processor
10. Soldering
Footprint information for reflow soldering of HLQFP144 package SOT612-4
Hx Gx P2 P1 (0.125)
nSPx
SPx
SPy SPy tot
Hy
Gy
SLy
By
Ay
nSPy
SPx tot SLx
C
D2 (8x) Bx Ax Generic footprint pattern
D1
Refer to the package outline drawing for actual layout
solder land
solder paste nSPx 4 DIMENSIONS in mm P1 P2 Ax Ay Bx By C D1 D2 Gx Gy Hx Hy SLx SLy SPx tot SPy tot 4.400 4.400 SPx SPy nSPy 4
occupied area
0.500 0.560 23.300 23.300 20.300 20.300 1.500 0.280 0.400 20.500 20.500 23.550 23.550 4.500 4.500
0.750 0.750
Fig 5.
SAF3560_SDS
Soldering footprint SOT612-4 (HLQFP144)
All information provided in this document is subject to legal disclaimers. (c) NXP B.V. 2010. All rights reserved.
Product short data sheet
Rev. 03 -- 15 September 2010
15 of 20
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
11. Abbreviations
Table 18. Acronym AEC AM BCK CA CD CGU CTS DAB DAC DSP EPG FM GPIO IF I2C-bus I2S I/O JEDEC JTAG MUX PLL RAM RS232 RTS SD SDR SDRAM SPI S/PDIF SRC UART WS
[1]
Abbreviations Description Automotive Electronics Council Amplitude Modulation Bit ClocK Conditional Access Compact Disc Clock Generation Unit Clear To Send Digital Audio Broadcasting Digital-to-Analog Converter Digital Signal Processor Electronic Program Guide Frequency Modulation General Purpose Input and Output Intermediate Frequency Inter-IC bus Inter-IC Sound Input/Output Joint Electronic Device Engineering Council Joint Test Action Group MUltipleXer Phase-Locked Loop Random Access Memory Recommended Standard 232[1] Ready To Send Secure Digital memory card Single Data Rate Synchronous Dynamic RAM Serial Peripheral Interface Sony/Philips Digital InterFace Sample-Rate Converter Universal Asynchronous Receiver Transmitter Word Select
A serial interface.
SAF3560_SDS
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product short data sheet
Rev. 03 -- 15 September 2010
16 of 20
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
12. Revision history
Table 19. Revision history Release date 20100915 Data sheet status Product short data sheet Change notice Supersedes SAF3560_SDS v.2 Document ID SAF3560_SDS v.3 Modifications:
* * *
The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted where appropriate. Minor text changes Product short data sheet -
SAF3560_SDS v.2
20100503
SAF3560_SDS
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product short data sheet
Rev. 03 -- 15 September 2010
17 of 20
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
13. Legal information
13.1 Data sheet status
Document status[1][2] Objective [short] data sheet Preliminary [short] data sheet Product [short] data sheet
[1] [2] [3]
Product status[3] Development Qualification Production
Definition This document contains data from the objective specification for product development. This document contains data from the preliminary specification. This document contains the product specification.
Please consult the most recently issued document before initiating or completing a design. The term `short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com.
13.2 Definitions
Draft -- The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet -- A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification -- The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet.
suitable for use in medical, military, aircraft, space or life support equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors accepts no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications -- Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer's sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer's applications and products planned, as well as for the planned application and use of customer's third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer's applications or products, or the application or use by customer's third party customer(s). Customer is responsible for doing all necessary testing for the customer's applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer's third party customer(s). NXP does not accept any liability in this respect. Limiting values -- Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale -- NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer's general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license -- Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights.
13.3 Disclaimers
Limited warranty and liability -- Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors' aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes -- NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use in automotive applications -- This NXP Semiconductors product has been qualified for use in automotive applications. The product is not designed, authorized or warranted to be
SAF3560_SDS
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product short data sheet
Rev. 03 -- 15 September 2010
18 of 20
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
Quick reference data -- The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Export control -- This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities.
13.5 Trademarks
Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. I2C-bus -- logo is a trademark of NXP B.V. HD Radio -- is a trademark of iBiquity Digital Corporation. HD Radio -- logo is a registered trademark of iBiquity Digital Corporation.
13.4 Licenses
ICs with HD Radio functionality NXP Semiconductors ICs with HD Radio functionality are manufactured under license from iBiquity Digital Corporation. Sale or distribution of equipment that includes this device requires a license, which may be obtained at: iBiquity Digital Corporation, 6711 Columbia Gateway Drive, Suite 500, Columbia MD 21046, USA. Telephone: +1 (443) 539 4290, fax: +1 (443) 539 4291, e-mail: info@ibiquity.com.
14. Contact information
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com
SAF3560_SDS
All information provided in this document is subject to legal disclaimers.
(c) NXP B.V. 2010. All rights reserved.
Product short data sheet
Rev. 03 -- 15 September 2010
19 of 20
NXP Semiconductors
SAF3560
Terrestrial digital radio processor
15. Contents
1 2 2.1 2.2 2.3 2.4 2.5 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 13.1 13.2 13.3 13.4 13.5 14 15 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 2 HD Radio technology . . . . . . . . . . . . . . . . . . . . 2 Digital audio . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Memory. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Other peripheral interfaces . . . . . . . . . . . . . . . . 3 Miscellaneous . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Quick reference data . . . . . . . . . . . . . . . . . . . . . 3 Ordering information . . . . . . . . . . . . . . . . . . . . . 4 Block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pinning information . . . . . . . . . . . . . . . . . . . . . . 6 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 7 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . 13 Thermal characteristics . . . . . . . . . . . . . . . . . 13 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 14 Soldering . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 17 Legal information. . . . . . . . . . . . . . . . . . . . . . . 18 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 18 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 Licenses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 19 Contact information. . . . . . . . . . . . . . . . . . . . . 19 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Please be aware that important notices concerning this document and the product(s) described herein, have been included in section `Legal information'.
(c) NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 15 September 2010 Document identifier: SAF3560_SDS

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